The present invention generally relates to a multiprocessor system and an access protection method conducted in the multiprocessor system or specifically to a multiprocessor system in which each of processors has a shared resource which is commonly used by other processors, and an access protection method conducted in the multiprocessor system.
In recent years, large numbers of multiprocessor systems have been utilized in which resources such as memories are shared among a plurality of processors. In such multiprocessor systems, the following problem occurs. That is, information stored in a memory area which is utilized by one processor can be erroneously overwritten because of possible runaways of tasks executed by other processors. If such an overwrite problem occurs, the normal operation of the task under execution by the processor is impeded, so the system operation of the multiprocessor system is brought into a failure.
Under such a circumstance, JP 09-297711 A (hereinafter, referred to as “related art 1”) discloses the technique related to the multiprocessor system capable of mutually avoiding the adverse influences caused by the runaways of the tasks among the plurality of processors. FIG. 9 is a block diagram for illustrating a multiprocessor system 100 disclosed in the related art 1. As represent in FIG. 9, in the multiprocessor system 100, a first processor 101A is connected to a second processor 101B via a system bus 105. Each of the first processor 101A and the second processor 101B includes a CPU board 101 and a memory board 103. The CPU board 101 includes an address producing unit 102, while the address producing unit 102 is connected to the memory board 103 via a local bus 104. In the multiprocessor system 100, when an access operation is performed from the first processor 101A to the memory board 103 of the second processor 101B, an address conversion is performed in the address producing unit 102 thereof. As a consequence, a control operation is carried out in such a manner that an area which is used by the second processor 101B in the memory board 103 to be mounted on the second processor 101B is not invaded by an access request issued from the first processor 101A.
In the related art 1, an address producing unit 102 controls access operations with respect to memory boards mounted on other processors by referring to access protection range setting values which have been previously set to a register in a fixing manner. Also, JP 2002-32352 A (hereinafter, referred to as “related art 2”) discloses such a structure capable of changing the access protection range setting values by utilizing the programmable logic device (PLD) as the register of the related art 1 even after the multiprocessor system has been manufactured.
However, even in the related art 2, the access protection range setting value cannot be changed in response to the utilizing conditions of the processor. In other words, the access protection ranges cannot be dynamically set in response to the programs which are executed by the processors. Under the above-described difficulties, the multiprocessor systems disclosed in the related art 1 and 2 have a problem that the resources cannot be shared by the processors in a flexible manner.